LT3743
APPLICATIONS INFORMATION
V CTRL ? 11μA/V
R C
R C =
[ ? ], C C =
f S ? L ? 1000V 0.002
AverageCurrentModeControlCompensation
The use of average current mode control allows for precise
regulation of the inductor and LED currents. Figure 16
shows the average current mode control loop used in the
LT3743, where the regulation current is programmed by
a current source and a 3k resistor.
To design the compensation network, the maximum com-
pensation resistor needs to be calculated. In current mode
controllers, the ratio of the sensed inductor current ramp
to the slope compensation ramp determines the stability
of the current regulation loop above 50% duty cycle. In
the same way, average current mode controllers require
the slope of the error voltage to not exceed the PWM ramp
slope during the switch off-time.
Since the closed-loop gain at the switching frequency
produces the error signal slope, the output impedance of
the error amplifier will be the compensation resistor, R C .
3k
L R S
MODULATOR
LOAD
+
g m
ERROR AMP
3743 F16
C C
Figure 16. LT3743 Average Current Mode Control Scheme
Table 6. Recommended Compensation Values
Use the following equations as a good starting point for
compensation component sizing:
[F]
V O ? R S f S
where f S is the switching frequency, L is the inductance
value, V IN is the input voltage and R S is the sense resistor.
For most LED applications, a 4.7nF compensation capaci-
tor is adequate and provides excellent phase margin with
optimized bandwidth. Please refer to Table 6 for recom-
mended compensation values.
For applications where the load is not an LED, please call
the factory for additional compensation assistance.
Board Layout Considerations
Average current mode control is relatively immune to the
switching noise associated with other types of control
schemes. Placing the sense resistor as close as possible
to the SENSE + and SENSE – pins avoids noise issues and
ensures the fastest LED current transition time. For currents
exceeding 5A, use 10? resistors in-series with SENSE +
and SENSE – , with a 33nF capacitor placed as close as
possible to the SENSE + and SENSE – pins. Utilizing a good
ground plane underneath the switching components will
minimize interplane noise coupling. To dissipate the heat
from the switching components, increase the area of the
switching node as much as possible without negatively
affecting the radiated noise. The interconnect inductance
and resistance between the output capacitors and the LED
load directly impacts the rise time of the load current. To
reduce the inductance and resistance, make the traces as
wide as physically possible and minimize the trace length.
V IN (V)
12
12
12
24
24
V O (V)
4
4
5
4
4
I L (A)
5
10
20
2
20
f SW (MHz)
0.5
0.5
0.25
0.5
0.5
L (μH)
1.5
1.5
1.8
1.0
1.0
R S (mΩ)
5
5
2.5
2.5
2.5
R C (kΩ)
47.5
47.5
38.3
52.3
52.3
C C (nF)
4.7
4.7
8.2
4.7
4.7
3743fd
20
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